Here at Hackaday we love projects that are so well-documented that you can spend days reading up on what the designer has achieved. [John Lonergan] didn’t disappoint when he designed the SPAM-1, an 8-bit CPU built from discrete logic gates. His detailed log contains a wealth of information on such things as designing opcodes, optimizing program counter logic, running a digital simulation, as well as his thoughts on microcode design. The sheer volume of it may be a bit off-putting to beginners, so it might be best to start with the video series that describes the architecture and goes into detail on several sub-blocks.
The design has changed a bit since [John] first started on the project, as he decided to add more and more features, but the final result is a well-thought out architecture that keeps the simplicity needed for discrete hardware but still has enough features to keep it interesting for seasoned CPU aficionados. The instruction size is rather large (48 bits) to simplify the instruction decoding at the expense of larger code size. Conditional jump instructions are not present; instead, all instructions have an optional control flag to make them conditional, a feature inspired by the ARM instruction set.
Once the design was mature enough, [John] modelled the entire thing in Verilog and simulated his design to verify correct operation and to check the timings, estimating it to be workable up to 5 MHz or so. A large stack of breadboards and DIP chips from the 74xx series then brought the design to life.
Not content with simply designing, simulating and implementing a custom CPU in ..
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